This invention relates to a current generating circuit applicable to an integrated circuit such as a semiconductor memory and also to an oscillator comprising such a current generating circuit.
FIG. 23 of the accompanying drawings schematically illustrates an oscillator of the type under consideration.
When the oscillator is operated, signal OSC is held to the supply potential Vcc and signal VGP is held to the ground potential (0V), while signal VGN is also held to supply potential Vcc.
Referring to FIG. 23, the delay time of an inverter circuit normally becomes reduced as the supply potential Vcc increases. Besides, the current level required for charging and discharging capacitors C1 and C2 increases at a rate greater than the first power of the supply potential Vcc as the latter also increases.
Thus, the oscillation period Tosc of the oscillator is shortened as the supply potential Vcc rises.
Therefore, when the oscillator is used as a timer, the oscillation period Tosc of the oscillator is reduced as the supply potential Vcc rises so that consequently the operating time of the timer is curtailed to reduce the margin of the operating timne of the timer for the operation of the chip because the oscillator period Tosc relies on the supply potential Vcc. To date, chips of the type under consideration are accompanied by the problem that the supply potential Vcc of the chip is confined to a narrowly limited range.
Now, let's look into a case where an output signal of the oscillator of FIG. 23 is used as drive signals RING, /RING for a booster as illustrated in FIG. 27.
Signal /OSC is held to the groun d potential (0V) when the booster is operated, whereas it is held to the supply potential Vcc when the booster is not operated. Note that, in FIG. 27, Qd1 denotes a depression type N-channel MOS transistor and Qn denotes an enhancement type N-channel MOS transistor.
The booster produces a potential higher than the supply potential Vcc on the basis of the supply potential Vcc and the drive signals RING, /RING, which potential is then output as output signal Vout. Generally speaking, the output current Iout of the booster is linearly proportional to Vcc--Vthn (where Vthn is a threshold value of the MOS transistor Qn) and inversely proportional to the oscillation period Tosc of the drive signals RING, /RING.
The output current Iout and the consumed current Icc of the booster can be expressed by specific formulas shown, employing the number of units n of the booster (which corresponds to the number of capacitors or that of inverters in FIG. 27); EQU Iout=k26.times.(Vcc-Vthn)/Tosc (15-1)
and EQU Icc=k27.times.(n+1).times.(Vcc-Vthn) Tosc (15-2),
where k26 and k27 are constants independent of the supply potential Vcc).
For the chip to operate in a stable manner, it is desirable that both the output current Iout and the consumed current Icc depend little on the supply potential Vcc.
However, when the output signal of the oscillator of FIG. 23 whose oscillation period relies on the supply potential Vcc is used as a drive signal of the booster of FIG. 27, the output current Iout and the consumed current Icc of the booster of FIG. 27 increases at a rate greater than the first power of the supply potential Vcc if the latter also increases. Thus, it is not possible to realize an output current Iout and a consumed current Icc that are stable relative to fluctuations in the supply potential Vcc.
As discussed above, there are known only oscillators whose oscillation period becomes curtailed as the supply potential Vcc rises. Thus, the output current Iout and the consumed current Icc of a booster using an output signal of such an oscillator inevitably rely heavily on the supply potential Vcc so that consequently it is not possible for the booster to operate in a stable fashion relative to fluctuations in the supply potential Vcc.